Testing DDR3 memory at enhanced complex bus speed is something that test engineers would like to see in their memory test system. Triad Spectrum, Inc. is proud to announce the TCII-1333ST memory test system that tests DDR3 memory at enhanced complex bus speed up to 1.33Gbps. The TCII-1333ST is now available for upgrade to 1.6Gbps.

Do not be fooled by competitors who promise “real time testing”, etc. as an alternative to enhanced bus speed testing. The terms are not synonymous and you have to be comfortable that your memory modules and chips are being tested in a manner that insures they will operate properly in the new high speed systems that are entering the market.

The TCII-1333ST can be used as a production tool as well as an engineering tool. With over 35 standard industry test patterns available for use in your testing process, there is no problem selecting the right patterns for your particular needs. In addition to the DC testing, the TCII-1333ST also supports AC testing. The AC testing feature will allow the end user to program test patterns using the script code option offered by Triad Spectrum, Inc.

The TCII-1333ST comes with 4 sites to assist you in this process. If you determine you need more test capability you can upgrade to multi-unit for testing in parallel. To further enhance the TCII-1333ST as an engineering tool, Schmoo plotting is an option that is available for design engineers to use when introducing new modules before they go to production. There is also engineering characterization for the DC/AC parameters. Error logging on Row/Column/BA and DQ’s is available.

Learn more about Triad Spectrum new TurboCATS II-1600ST 1.6Gbps DDR3 DIMM test system.

Manufacturers of memory devices continue to stress the importance of reducing the costs to manufacture modules while maintaining test integrity. Major OEM's have challenged the engineering team at Triad Spectrum, Inc. to develop a test system that will compete with higher cost ATE's in terms of achieving the type of correlation found in high end ATE's yet at a fraction of the cost.

The TCII-1333ST is being released and will offer more DC patterns than the TCII-800 currently in use by a large number of major OEM’s. The speed of the DDR3 memories requires that termination resistors used on DIMM’s have the right value. If a wrong value is used or if a termination resistor is placed incorrectly on the PCB, the DIMM is very unstable in a high speed environment.

Leakage tests, contact tests, and connectivity tests are now part of the basic package offered in the TCII-1333ST memory test system. Eliminating mistakes in the early stages of testing saves both time and money for the OEM during the production process. These critical tests are now available in a test system that offers correlation results equal to much more expensive ATE’s at a fraction of the cost.

An optional handler interface allows the tester to communicate to a handler which perform DIMMs sorting and binning after testing.

Bitmap is a tool that helps users to find and display the failed DQ bits in the DRAM IC. The corresponding row and column address of the failed DQ bits will be spotted and displayed for the user with the aid of the diagrams. First, for example, the failed Bank is spotted (Figure 1). After that, the user can find the location of the failed DQ bit (Figure 2) if the user double-clicks the failed Bank.

This will detect shorts on the signal line as well as detect proper values of resistor packs and discreet resistors to insure that proper values are used in all places as well as insuring that they are properly mounted.

A pattern that will detect any "open pins" on the contacts in between test sockets and DIMM’s before functional testing begins. This pattern will also detect any open pins on both passive and memory components on the PCB.

Shorts ranging from 0 Ohm up to 600 Ohms will be detected on the DUT.

Voltage ref short detection including programmable VrefCA and VrefDQ.