TCII-1200D DDR1/DDR2/DDR3
TCIII-1200D DDR1/DDR2/DDR3
TCII-1200IC DRAM, SDRAM, DDR1/2/3, Nand/Nor Flash & MCP
     
TCIII-1200IC DRAM, SDRAM, DDR1/2/3, Nand/Nor Flash & MCP
     
TCII-1200AD DDR1/DDR2/DDR3
TCIII-1200L DDR2/DDR3
TCIII-6400-SNDT SND & DwSND
TC-Express DDR2/DDR3
Accessories & Extras
HT-1000 DIMM Handler
HT-5064 IC Handler



Flash Menu Placeholder.
 
  Address Mode Depth: Up to 128 Gbytes (24 bits row, 12 bits column)
  Data Width: 8 bits or 16 bits device
  Maximum Frequency: Up to 100Mhz
  Multi-site Testing: 64 of NAND's for 8 bits & 64 of NAND's for 16 bits
  Device Type: Small/Large page, Monolethic/Stack, SLC/MLC
  Package Type: TSOP, USOP, WSOP, etc.
  Voltage Supply: 3.3V, 2.7V and 1.8V
  PC Interface: graphical user interface, database, timing editor, pattern editor, handler interface
  S.A.T.: Specific Application Test which allows user to simulate real application environment
  Timing Editor: User defines timing cycles for specific application bus and timing operation
  Pattern Editor: User defines test algorithms for specific test patterns
  ICC Testing: Per site measurement of Standby, Erase, Program and Read Operation
  Leakage Testing: Per site and per pin measurement
  Build in device library: Supports all standard devices

 
   
Main screen
 
Test file
   

 
   
Graph timing
 
Pattern editor

  Copyright © 2010 Triad Spectrum, Incorporated.
  All rights reserved.